1. Field of the Invention
The present invention relates generally to a method for manufacturing semiconductor devices, and more particularly to an improved method for fabricating field effect transistors with vertical channel.
2. Description of the Prior Art
In the past few years, short-channel devices have generated considerable interest. However, conventional submicrometer devices require sophisticated techniques for fabricating the short gate. The reduction of the channel length gives rise to short-channel effects to cause the degradation of device performances, which in turn lowers the device operation speed.
In an effort to avoid aforementioned problems, a vertical channel field effect transistor (FET) has been disclosed. The vertical FET has considerable advantage compare to conventional planar transistors. The dominant features are that the vertical FET structure has made possible the fabrication of submicrometer devices without sophisticated submicrometer lithographic processes, and the source and drain parasitic series resistance can be drastically reduced.
Many of the vertical FET's reported up to date. For example, there are a permeable base transistor, a ballistic-type transistor, and a transistor with vertical channel grown by an epitaxial growing method.
However, since these conventional vertical FET technologies are need for sophisticated submicrometer lithographic processes and advanced crystal growth techniques, the reproduction and mass production are reduced in the fabrication of the vertical FET.